发明名称 INTERRUPTION PROCESSING METHOD
摘要 <p>PURPOSE:To assure the direct digital control with high accuracy and high stability, by delaying the interruption signal to be applied to the lower microprocessor for a prescribed period of time in case when the interruption is applied to two microprocessors by means of a common timer. CONSTITUTION:The simultaneous interruption is controlled by an external timer 70, and the timer interruption signal 81 to be applied to a lower computer 30 is delayed by a delaying circuit. As a result, the computer 30 can receive a command value fetch request interruption 4 from an upper computer 10 at a desired period. The computer 30 can have a sufficient margin of time to execute the process even at a time point when an interruption is given from the computer 10 and although the computer 10 occupies the greater part of the sampling time for production of the command value since the starting of the computer 30 is delayed by a prescribed time for each sampling period. The delay time is decided from the time for processing both programs 3 and 37.</p>
申请公布号 JPS57120106(A) 申请公布日期 1982.07.27
申请号 JP19810004999 申请日期 1981.01.19
申请人 HITACHI SEISAKUSHO KK;HITACHI ENGINEERING KK 发明人 MIYAHARA YOUJIROU;KAMIYAMA KENZOU;YAMAMOTO KENJI
分类号 G05B15/02;G06F9/48;G06F15/16;G06F15/177 主分类号 G05B15/02
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