| 摘要 |
<p>Case 23 - Chea SIGNAL CODING FOR COMPRESSED PULSE CODE MODULATION SYSTEM A codec including an encoder section for encoding analog signals in compressed PCM (CPCM) and a decoder section for decoding CPCM information into analog signals features a single companding generator shared by the encoder and decoder sections. In the encoder section, an analog signal to be encoded is sampled periodically and the analog samples are compared with the decaying voltage of the companding generator which includes a capacitor, which is initially charge to a fixed voltage E. The capacitor is then discharge through a fixed resistance to another fixed voltage -dE, the discharge time being measured by a binary digital encoder counter from the start of the discharge until the voltage on the capacitor equals the absolute value of the given analog signal sample, at which time the count of the binary counter represents the desired compressed pulse code of the analog signal samples magnitude. Additionally, a sign bit, derived from the analog signal sample, indicates the polarity of said sample. In the decoder section, a CPCM input signal to be decoded is loaded into a decoder counter, which is decremented to a zero count, while the decaying voltage of the companding generator is sampled. The resultant sample represents the magnitude of the analog signal output for the decoded CPCM code, either directly or inverted, depending upon the sign bit. This sampled signal is further presented to a low-pass filter at a predetermined interval of the codec operating cycle dictated by the sampling frequency. The output of low-pass filter is the desired reconstructed analog signal.</p> |
