发明名称 |
EXECUTION UNIT FOR DATA PROCESSOR USING SEGMENTED BUS STRUCTURE |
摘要 |
A data processor having an execution unit employs a segmented bus structure and a dual port register cell in order to increase circuit density and in order to allow address and data computations to occur simultaneously. The circuit is designed to interface with an external 16-bit bidirectional data bus and an external address bus having as many as 32 address bits. Serial bus switches on each of two parallel buses allow concatenation with a second pair of buses. Each bus, while 16 bits wide, actually utilizes two conductors per bit to carry data and the complement thereof. |
申请公布号 |
DE2963026(D1) |
申请公布日期 |
1982.07.22 |
申请号 |
DE19792963026 |
申请日期 |
1979.10.11 |
申请人 |
MOTOROLA, INC. |
发明人 |
GUNTER, THOMAS GLEN;TREDENNICK, HARRY LESLIE;MC ALISTER, DOYLE VERNON |
分类号 |
G06F9/30;G06F9/38;G06F15/78;(IPC1-7):G06F15/06 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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