| 摘要 |
<p>PURPOSE:To reduce the number of pins, by providing a duty ratio detecting means connected to a clock input terminal in a chip, detecting the duty ratio of a signal inputted to the clock input terminal and controlling the circuit in the chip through the detected output. CONSTITUTION:When a clock signal 2 is inputted to a terminal 2 at normal operation, the signal 21 is applied to a smoothing circuit 5 via a buffer circuit 4. The circuit 5 makes integration of the signal 21 and outputs a level A with 50% duty ratio. The level of 70% duty ratio is set to a comparator 6 and the level of 30% duty ratio is set to a comparator 7, and a logical circuit 8 detects that the level A is at a level >=30% and <=70%, and no control signal is outputted to the internal circuit. On the other hand, at test when a clock signal 22 is inputted, the integration is made at the smoothing circuit 5 similarly mentioned above, and the level B of 90% duty ratio is outputted, and when it is inputted to the comparator 6, the level is judged as >=70% at the logical circuit 8 to output the control signal.</p> |
