Demodulation circuit for delay-modulated data signals - has two changeover switches switching two demodulators to up=down counter

摘要

The demodulation circuit has two demodulators (7,8). The first (7) receives the clock signal (T) in one of its two opposite phase states and the second receives the clock signal in its other state. An auxiliary circuit (10) contains an up/down counter that receives up-pulses from the first demodulator and down-pulses from the second demodulator. The outputs of the two demodulators are connected via two changeover switches (9) to the two count inputs of the up/down counter. These are supplied as a NRZ signal (2).