发明名称 SAMPLING CLOCK REPRODUCING APPARATUS
摘要 Improved sampling clock reproducing apparatus for receiving digital signal which is superimposed in the television signal during a vertical blanking interval. The sampling clock signal is made by selectively gating a pilot signal from the superimposed signal, obtaining a square thereof, then passing it through a resonance circuit with a resonance frequency twice a repetition frequency of the pilot signal. Thus, the sampling clock signal of the frequency twice the repetition frequency of the pilot signal is obtainable without digital processing attaining high durability against noises.
申请公布号 EP0021132(B1) 申请公布日期 1982.07.14
申请号 EP19800103062 申请日期 1980.06.02
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 FUKUDA, SHIN;HIRASHIMA, MASAYOSHI
分类号 H04L7/027;H04N7/00;H04N7/025;H04N7/03;H04N7/035;H04N7/083;H04N7/087;H04N7/088;H04N17/00 主分类号 H04L7/027
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