发明名称 Digital sample and hold with rollover inhibit
摘要 An electronic circuit for sampling a digital pulse train signal and providing a replication in place thereof during a selected holding period includes a binary counter and register for counting and storing a clock pulse of substantially higher frequency than the sampled digital pulse train together with control gates for inhibiting the counter from rolling over in the event that the period of the sampled digital pulse train becomes so long that the maximum binary count capacity of the counter is reached. The sampled digital pulse train signal is preferably provided by the scene light detecting and integrating circuit of a photographic camera apparatus and the holding period during which the digital pulse train signal is substituted by the replicated signal corresponds to the flash fire duration of a strobe.
申请公布号 US4339184(A) 申请公布日期 1982.07.13
申请号 US19800213415 申请日期 1980.12.05
申请人 POLAROID CORPORATION 发明人 BAGDIS, JUDY
分类号 G03B7/091;(IPC1-7):G03B7/09;H03K5/00 主分类号 G03B7/091
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