发明名称 MEMORY CONTROL SYSTEM
摘要 PURPOSE:To protect the data stored in a memory and to realize a small and simple constitution of a memory, by securing an access of a prescribed byte number to a specific memory after writing a prescribed data into a prescribed circuit. CONSTITUTION:When a main memory MM and a specific memory SM are read, an address signal to receive an access is supplied to an address signal line AL. A decoder DC decodes the address signal to give the rise to the chip selection signal of a chip selection line CSO or CSI during the supply of the address signal. When a data is written into the memory SM, an address signal corresponding to the address allotted to an allowable period setting circuit is first supplied to the line AL. At the same time, the mode signal supplied to a mode signal line RWO is defined as the writing mode level. The decoder DC decodes the mode signal to give the rise to the signal which is supplied onto a selection line SL of the allowable period setting circuit.
申请公布号 JPS57111866(A) 申请公布日期 1982.07.12
申请号 JP19800187798 申请日期 1980.12.29
申请人 FUJITSU KK 发明人 YANAGISAWA TSUTOMU;KURIMURA SASAE
分类号 G06F12/14;G11C8/20;(IPC1-7):11C8/00 主分类号 G06F12/14
代理机构 代理人
主权项
地址