发明名称 INTERSYMBOL INTERFERENCE COMPENSATING CIRCUIT
摘要 PURPOSE:To compensate an intersymbol interference by a digital circuit of the same type even if a transmission waveform and a transmission characteristic are different, by changing the number of discrimination and decision in accordance with a result of discrimination of the previous input data. CONSTITUTION:As for input data (a), a high frequency clock (b) and an NOT circuit 6 are brought to AND by an AND circuit 1. A counter 5 is set by a clock signal (c), and counts a high frequency clock of the circuit 1. A counting value deciding circuit 7 makes its output ''0'' in case when an output of a shift register 9 for storing data discriminated before is inputted, and a counting value of the counter 5 does not reach an optimum counting value that has been detected. Also, when said counting value has reached the optimum counting value, ''1'' is outputted, the circuit 1 is closed through the circuit 6, and after that, passing of the clock (b) is inhibited, and the constancy of an output of the counter 5 is held until the next signal (c) is inputted to the counter 5 and the counter 5 is reset. Also, an FF8 shapes a discriminating output of the circuit 7 by the signal (c) and obtains the discriminating output 10 of a binary NRZ code.
申请公布号 JPS57111134(A) 申请公布日期 1982.07.10
申请号 JP19800185007 申请日期 1980.12.27
申请人 HITACHI SEISAKUSHO KK 发明人 ASHIDA AKIRA
分类号 H03M5/08;H04B3/06;H04L25/08;H04L25/40 主分类号 H03M5/08
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