| 摘要 |
PURPOSE:To enhance the integration of a dynamic RAM at a folded bit line type one transistor one capacitor type memory by a method wherein one side of a pair of adjoining bit lines are made to be interposed between the pair of sense amplifier bit lines, and adjoining capacitors are made to be interposed between respective capacitors. CONSTITUTION:One side of the pair of bit lines of the adjoining sense amplifier are made to be interposed between the pair of folded bit lines (B0, -B0), (B1, -B1), ... to be connected to the respective sense amplifiers. Word lines are made to be used both as the gate electrode of an FET for transfer gate, and the capacitors to be connected to the respective bit lines through the FET are made to mesh with the capacitors of the adjoining bit lines mutually. Accordingly enhancement of integration of the one transistor one capacitor type dynamic RAM can be attained. |
