| 摘要 |
PURPOSE:To reduce cost of a substrate for arrangement by a method wherein on a substrate for element arrangement which is covered with a copper or copper alloy layer, a semiconductor element is mounted, and the semiconductor element and the substrate for arrangement are connected with a gold or gold alloy wire. CONSTITUTION:On an island region 103 of a lead frame which is covered with a layer 102 consisting of copper or copper alloy, a bipolar silicon transistor element 105 is mounted with intermediaries of a vanadium layer 106 and a nickel layer 107. The end of a gold or gold alloy wire 112a is bonded to an Al electrode 111a of the element 105, and another end of the wire 112a is bonded to a lead region 104a of a lead frame covered with a copper or copper alloy layer 102. Accordingly, because there is no need for forming a silver-plated layer, the lead frame can be manufactured at a low cost. |
