| 摘要 |
PURPOSE:To enable to apply the cell to a wider application, by using a transistor (TR) in which the emitter has a resistor and the collector and base have no connection as an output load or input protection. CONSTITUTION:In a cell for OR/NORECL (emitter coupled logic) gate, TRs Q6, Q7, Q8 in which the collector and base have no connection and a resistor is provided between the emitter and the power supply line are provided near the input terminal or output terminal. In the cell, terminals 5 and 6, 7 and 8, 4 and 9, and 4' and 10 are connected, and the base is taken as the input terminal, allowing to obtain an OR/NOR gate having a constant current load. When the terminal 8 is connected to the input terminal 1 and the base of a TRQ8 is kept open, the cell can be used for a protection circuit for the input terminal 1. |
