| 摘要 |
PURPOSE:To facilitate control of threshold of both type of gate FETs by forming the gate for N-type FET and for P-type FET successively in separate processes after a well region and field layer are formed. CONSTITUTION:For example, after providing P well on an N-type substrate to form an inversion blocking layer by ion implantation, a field oxide layer is formed through a nitride film. Next, after impurities are introduced by ion implantation into the region A for P-type FET to form a threshold control layer 21, a gate oxide layer 22 is then produced. Following this, an oxide layer 22 other than that for the gate is removed by etching after the gate electrode 23 of polysilicon on the region A and the interconnection 24 on the field oxide layer are formed. Next, P<+> layers 27, 28 are formed by ion implantation in the P-type FET after the gate layer 25 and a threshold control layer 26 are formed on the N-type FET region. The polysilicon gate 29 of the N-type FET is then produced, and the N<+> source and the N<+> drain 30, 31 are formed by ion implantation respectively. Each FET threshold can easily be controlled by constructing both channel type gates independent of each other. |
