| 摘要 |
<p>PURPOSE:To reduce cost by minimizing the pitches between adjoining circuits owing to arrangement of sides of ICs on the tape carrier in angled setting instead of being at right angles or parallel to the longitudinal axis of the tape carrier. CONSTITUTION:In process of mounting an electronic circuit 4 which consists of, for example, an IC 2 and a quartz crystal oscillator 3 and layout of which has already been settled by gang bonding on the tape carrier 1, relative location of the ICs to the tape carrier 1 is to be such a manner as the ICs 2 are placed diagonally on the tape carrier to minimize a distance 4B between adjoining electronic circuits 4 instead of the sides of the ICs 2 being at right angles or parallel to the longitudinal axis of the tape carrier as in conventional practice. By such a method, waste space on the tape carrier 1 can be minimized so that the production cost can be reduced because of shortening processing time as well as reducing material cost.</p> |
