| 摘要 |
PURPOSE:To realize an oscillation diagram from which the oscillation output signal of an optional frequency is obtained with a high precision, by adding a circuit, which sets a variable period, to a counter. CONSTITUTION:For the purpose of detemrining an oscillation frequency, 0101 is set to latches 5, 7, 9, and 11 by a microprocessor unit MPU33. A clock signal S3 generated by a clock generator 3 is inputted to a counter 1; and each time one pulse is inputted, the binary count result is outputted with output signals S15- S21 and are supplied to OR gates 13, 15, 17 and 19 together with respective output signals of the MPU. When all outputs of OR gates become 1, an output S51 of an AND gate 31 becomes 0, and by this output 0, the counter 1 is cleared by a next clock signal S3 to reset the output all to 0. Hereafter, as long as logical states of latches 5-11 are not changed, the output S51 has the output signal of a constant period T0 (=6Tc). When the logical state of the MPU33 is changed, the output signal S51 of another period is obtained. |
