| 摘要 |
PURPOSE:To reduce the power consumption, by providing plural unit logical gates where driving field effect transistors and load transistors are connected in series and by supplying complementary inputs to them and by connecting the output of the logical gate of the preceding stage to the driving transistor of the next stage. CONSTITUTION:A driving MOS transistor TRQ1 and a load MOS TRT1 are connected in series; and when an input A of a gate G1 of the preceding stage is H-level, the TRT1 is turned on, and the TRQ1 is turned off, and the H-level due to a power source voltage VDD appears at an output terminal through the load TRT1. When the input A is L-level, a point B becomes H-level, and TRs Q1 and T1 are turned on and off, respectively, and the output terminal becomes L-level. Thus, a current flowed from the power source voltage VDD to the earth is zero in both cases to reduce the power consumption. When a two-input NOR gate circuit is constituted with this unit logical operation circuit, the output of the gate of the preceding stage is applied to the gate terminal of the driving TR, and the driving element and the load element are operated reversely. |
