| 摘要 |
PURPOSE:To improve the dielectric resistance of the FET, to reduce input capacity and to decrease the scatter of gate leakage currents by utilizing double diffusion from the same diffusion window. CONSTITUTION:An N type impurity (such as phosphorus) is introduced selectively into a P type semiconductor substrate 11 through ion injection, and driven in, and an N type well region 12 is formed. The selective diffusion window of a gate region 13 is shaped into the well region 12 by a silicon oxide film, and the ions of phosphorus and boron are doubly injected by utilizing the window. That is, phosphorus ions are injected and driven in and a channel region 14 is formed, and boron ions are further injected and driven in and the gate region 13 is shaped. An N<+> type source region 15 and a drain region 16 are molded. Accordingly, the impurity concentration of a P-N junction in the vicinity of the surface of a side surface of the gate region 13 is decreased, and the characteristics of an element are improved. |
