发明名称 Memory circuit with means for compensating for inversion of stored data
摘要 Information stored in a reference cell is inverted when the information stored in a memory cell is inverted. The memory cell information is derived from a first Exclusive OR gate receptive of an input data signal and the reference cell output signal. Information is read out of the memory cell via a second Exclusive-OR gate receptive of the output of the memory cell and the output of the reference cell. Regardless of any inversion within the memory cell, the signal produced at the output of the second Exclusive OR gate is of the same binary significance as the input data applied to the first Exclusive-OR gate.
申请公布号 US4337522(A) 申请公布日期 1982.06.29
申请号 US19800145324 申请日期 1980.04.29
申请人 RCA CORPORATION 发明人 STEWART, ROGER G.
分类号 G11C7/14;G11C11/4063;G11C14/00;(IPC1-7):G11C7/00 主分类号 G11C7/14
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