| 摘要 |
PURPOSE:To prevent malfunction at reception side, by providing a circuit detecting the presence of a transition of an enable signal during data transmission at reception side and outputting the result of discrimination at the same time as the end of data transmission. CONSTITUTION:A clock signal (c) is inputted to counters 4, 5 for count up at the same time. If an enable signal (a) includes any transition, a counter 4 is immediately reset and detection of coincidence is not made at a comparator 6 and the output is at low level. If no transition is present, the output remains high in the level. When (m) sets of clocks are inputted, a comparator 7 outputs a coincidence detecting signal (f), which is inputted to an end of discrimination timing pulse generator 11, and one-shot pulse for a signal (h) is generated after a prescribed time. A pulse of the signal (h) is read in for the level of an output (d) from a differentiation circuit 9 and the presence of transition of the enable signal (a) is detected, allowing to check the reliability of an inputted serial data. |
