发明名称 CASH MEMORY CONTROL SYSTEM
摘要 PURPOSE:To eliminate the need for the V-bit part of a cash memory by storing a effective signal for the contents of the cash memory temporarily, and by discriminating the contents effective signal. CONSTITUTION:A control part 6 reads and executes a routine program R in a memory 2, and writes addresses and data, read out of the memory 2, in the address part A and data part D of a cash memory 4. Once the writing operation ends, the control part 6 sends a control signal B to set an FF7. A discriminating circuit 3 compares a memory address M and a cash memory address L with each other to make a decision and, when confirming that the output signal of the FF7 is 1, sends a control signal C. Therefore, a readout control circuit 5 reads data (d) out of the cash memory 4.
申请公布号 JPS57103180(A) 申请公布日期 1982.06.26
申请号 JP19800179851 申请日期 1980.12.19
申请人 FUJITSU KK 发明人 SHIBATA TOMOHITO;KOBAYASHI MASAAKI;HASHIMOTO SHIGERU
分类号 G06F12/08 主分类号 G06F12/08
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