发明名称 PULSE COUNT CIRCUIT
摘要 PURPOSE:To count the number of input pulses accurately and to make the display of result of comparison stable, by comparing the count value for a prescribed time of the input pulses of previous and present time, and controlling the latch contents whether said contents are to be kept as much as the previous content through the control of the gate. CONSTITUTION:An FF2 of the 1st timer circuit is set with an input signal and a counter 8 counts input signal pulses via a counter 3 which counts a specified number of reference pulses from a reference signal generating circuit 4. The count value of the counter 8 is latched with a latch circuit 9 and compared with the previous count value of a latch circuit 10, and when the count value of this time is -1, the output of a comparison circuit 11 is inverted to a high level and an AND gate 14 is not opened via a NAND gate 13. Thus, a rewriting instruction signal with an output of a counter 7 of the 2nd timer circuit 5 to rewrite the contents of the circuit 10 into those of the circuit 9 is interrupted, the deficient count value of this time is not latched to the circuit 10, and the number of input pulses is counted accurately, allowing to make the result of count stable without flickering.
申请公布号 JPS57103066(A) 申请公布日期 1982.06.26
申请号 JP19800179325 申请日期 1980.12.18
申请人 TOKYO SHIBAURA DENKI KK 发明人 SHINDOU SHIYOUJI;WATANABE FUKUYOSHI
分类号 H03K21/08;G01R23/10;G01R23/15 主分类号 H03K21/08
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