发明名称 PREPARATION OF FIELD-EFFECT TRASISTOR
摘要 PURPOSE:To prepare FET wherein electrodes are provided at an interval of submicrons, by providing a Schottky metal layer on te whole surface of a substrate whereon source and drain electrodes are formed and by forming a gate electrode through etching by using a mask layer which is left in the concave part of a channel region. CONSTITUTION:The source and drain electrodes 24 and 25 are formed by coating on an N type layer 22 provided on a semiinsulating substrate 21 such as Si, SiO2 is connected on the whole surface, anisotropic etching is applied thereto, SiO2 films 44 and 45 are left thereby at the end parts of the electrodes and an N type layer 28 is exposed. Next, a metal layer 29 such as Ti is connected on the whole surface to form a Schottky junction 36. Thereafter a resist, for instance, is applied on the whole surface and is processed, for instance, by O2 plasma to make a resist mask 35 remain on the channel region. Subsequently, the gate electrode 37 is formed by etching the metal layer 29, the mask 35 is removed and thus a structure of FET is prepared. By this constitution, the interval between the electrodes is placed in a submicron order, whereby FET having improved characteristics can be prepared.
申请公布号 JPS57103364(A) 申请公布日期 1982.06.26
申请号 JP19800179399 申请日期 1980.12.18
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 ASAI KAZUYOSHI
分类号 H01L29/80;H01L21/338;H01L29/417;H01L29/812 主分类号 H01L29/80
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