发明名称 MEMORY ADDRESS EXTENSION SYSTEM
摘要 PURPOSE:To extend an address, by providing an address extension indicating FF, setting this FF to an address extension indicating state, forming working and stand-by main storage devices to a double system, writing the same contents simultaneously by the common address, and making each storage device independent as necessary. CONSTITUTION:Storage control devices MMC0, MMC1 are connected to plural main storage devices MM0, MM1, and control devices CC0, CC1 are connected to the devices MMC0, MMC1 through a bus B, so that the same contents can be written by a common address in one working device MM0 and the other stand- by device MM1. To the respective exclusive OR gates EOR0, EOR1 connected to terminals AM of these devices CC0, CC1, address extension FFs MF0, MF1 are connected, and the devices MMC0, MMC1 are controlled by outputs of the gates EOR0, EOR1. In this state, the same contents are written in the devices MM0, MM1 by the same address as a double system, and also are written in each device MM0, MM1 independently by the FFs MF0, MM1 as necessary.
申请公布号 JPS57101958(A) 申请公布日期 1982.06.24
申请号 JP19800177648 申请日期 1980.12.16
申请人 FUJITSU KK 发明人 GOUUKON KAZUHIKO;KUWATA SATORU
分类号 G06F12/16;G06F12/06;G06F15/16 主分类号 G06F12/16
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