发明名称 |
Method for planarizing non-level silicon dioxide in semiconductor devices. |
摘要 |
<p>The present invention provides a method for planarizing a non-uniform thickness of oxide, for example silicon dioxide, as is formed over oxide-filled trenches used in deep dielectric isolation in integrated circuits. The oxide is removed by a planarizing resist-etching process so that etching in thicker resist areas proceeds at a rate slower than etching in thinner resist areas. A preferred etchant is HF gas and etching is preferably at an elevated temperature.</p> |
申请公布号 |
EP0054164(A1) |
申请公布日期 |
1982.06.23 |
申请号 |
EP19810109170 |
申请日期 |
1981.10.29 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ANANTHA, NARASIPUR GUNDAPPA;BHATIA, HARSARAN SINGH;LECHATON, JOHN S.;WALSH, JAMES LEO |
分类号 |
C01B33/12;H01L21/302;H01L21/3065;H01L21/3105;H01L21/311;H01L21/312;H01L21/76;(IPC1-7):01L21/312;01L21/31 |
主分类号 |
C01B33/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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