Method of forming integrated MOSFET dynamic random access memories.

摘要

A method of manufacturing MOSFET RAM capable of delineating short (less than 1 micrometer) lightly doped drain regions. An N- implant is effected between gate electrodes (13) and field oxide insulators (11). An insulator layer (14, 16) is then deposited. Reactive ion etching of the layer leaves narrow insulator regions adjacent the gate electrode (13) which serve to protect portions of the N- impurity region during a subsequent N+ implant. These protected regions are the lightly doped source/drain regions.