发明名称 INPUT/OUTPUT GATE CIRCUIT
摘要 PURPOSE:To avoid the working of an undesired circuit, by fixing the output of an input/output gate at ''H'' or ''L'' level and accordingly stabilizing the state of an internal circuit in an output state. CONSTITUTION:A gate circuit is formed by connecting a bus line to the joint between an output gate which is capable of having three states, i.e., level ''H'', level ''L'' and a high impedance for its output and an input gate in which an input terminal is connected to the output terminal of the output gate. Then the output of the input gate is fixed at level ''H'' or ''L'' in an output state. For instance, an input gate Gi'' is turned into a double input inverter, and a high impedance control signal B is inverted and connected to an input terminal. Thus an output gate G0 is set at a high impedance by level ''L'' of the signal B. As a result, the state of an internal circuit is stabilized.
申请公布号 JPS57100523(A) 申请公布日期 1982.06.22
申请号 JP19800176682 申请日期 1980.12.15
申请人 FUJITSU KK 发明人 SUGIHARA TAKANORI
分类号 H03K19/0175;G06F3/00;H03K19/00 主分类号 H03K19/0175
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