METHOD AND ARRANGEMENT OF TESTING SEQUENTIAL CIRCUITS REPRESENTED BY MONOLITHICALLY INTEGRATED SEMICONDUCTOR CIRCUITS

摘要

An LSI monolithically integrated semiconductor circuit consisting of sequential circuits and combinational circuits contains a considerable number of storage elements designed as latches which for error detection are assembled into a shift register. If a sequential circuit thus built of several minimum replaceable units is error checked according to the invention no major additional process steps in the form of further terminals and connecting pins to a module representing the minimum replaceable unit will be required. As disclosed by the invention, by minor modification of the respective input circuits in the minimum replaceable units, the first two shift register stages of a respective minimum replaceable unit are first brought into their respective complementary states. Then the shift register contents are read out in a conventional manner, with the bit positions represented respectively by the first two shift registers in all minimum replaceable units being examined at the shift output for bit equality. If bit equality is found it can be concluded that the directly preceding minimum replaceable unit shows a stuck fault. After the defective minimum replaceable unit has been exchanged the stuck fault test is repeated so a to be able to isolate any other stuck faults that might precede that minimum replaceable unit.