发明名称 COMPUTER SYSTEM
摘要 PURPOSE:To prevent system down caused by misoperation, by newly providing a line connection/disconnection device at a CPU side. CONSTITUTION:When the operator selects a line selection switch 31 and an interruption is given to a CPU7 with a line connection designating switch 5, a processing section B is started, and the processing section B sets an F1 of flags F1-FN corresponding to line selection switches 31-3N to ''1''. When interruption is given to the CPU7 with a line disconnection designation switch 6, the section B is started similarly and the flag F1 is set to 0 this time. On the other hand, data from CDT master stations 11-1N is inputted to a processing section A of the CPU7 via DXI/021-2N. After the processing section A fetches this data, it discriminates the said flag F1, and if it is at ''1'', the content is stored the j-th area of a memory RD1 and if ''0'', it is not stored. Thus, a pocessing section C making monitor control by using the reception data stored in memories RD1-RDN, discriminates the effective/ineffective data, allowing to execution/stop of processing.
申请公布号 JPS5799051(A) 申请公布日期 1982.06.19
申请号 JP19800174504 申请日期 1980.12.12
申请人 HITACHI SEISAKUSHO KK;HITACHI ENGINEERING KK 发明人 TOUMA ICHIROU
分类号 H04Q9/00;G06F13/40 主分类号 H04Q9/00
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