| 摘要 |
PURPOSE:To increase dielectric resistance by a method wherein the shape of a P-N junction going round under a substance, which does not permeate impurities, shaped to one main surface of a semiconductor substrate is utilized, a V-shaped groove is formed to the junction, a P-N junction crossing with a positive bevel angle is shaped, and a gate electrode is molded. CONSTITUTION:A P type diffusion layer 402 and an N type impurity diffusion layer 403 are formed onto the N type substrate 401 having low concentration through a silicon nitride film 409. The diffusion layers 402, 403 go round to a section covered with the layer 409, which does not permeate impurities, and curved sections are shaped at that time. The layer 409 is removed, anisotropic etching is executed from an exposed section, and an inclined plane 407 of the V-shaped groove is formed. The gate electrode 406 is shaped here through a gate insulating film 410. Accordingly, resistance at the time of ON can be lowered by shortening a distance between each electrode of a channel and a source and increasing the degree of integration of the width of the channel, and the drop of dielectric resistance is prevented. |
