发明名称 PROBING METHOD FOR LARGE-SCALE INTEGRATED LEAD PIN IN MOUNTING SUBSTRATE
摘要 PURPOSE:To conduct a desired lead pin positively, and to decrease persons required for the inspection of the substrate to zero and increase the speed of the inspection by putting anisotropic rubber sheets among the lead pins arranged at minute pitches as connectors and attaching the sheets by pressure by means of a probing pin. CONSTITUTION:In a probing test for a LSI 1 mounted to the circuit substrate, the desired lead pin is selected from a large number of the lead pins 3, which are disposed around the LSI 1 at minute pitches and connected to a conductive pattern of the substrate, and the probing pin 16 is conducted. The lead pins are probed in such a manner that the anisotropic rubber sheets 17 in which conductive rubbers 18 and insulating rubbers 19 are alternately laminated and arranged in the length L direction are put among three rows of the lead pins and the probing pin 16. The lead pin can be conducted positively even when more or less displacement delta exists among the pins 3 and the pin 16 by setting an arranging pitch P of the anisotropic rubber sheets 17 to proper value. Accordingly, the pins 3 are easily selected, and the speed of the probing test for the substrate to which a large number of the LSIs are mounted can be increased and persons for the test can be decreased to zero.
申请公布号 JPS5795643(A) 申请公布日期 1982.06.14
申请号 JP19800170997 申请日期 1980.12.05
申请人 HITACHI SEISAKUSHO KK 发明人 YAMAMOTO SHINGO
分类号 G01R31/26;G01R1/073;H01L21/66 主分类号 G01R31/26
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