发明名称 MEMORY CIRCUIT
摘要 PURPOSE:To shorten access time by shortening the time until a one-shot signal reaches an equalization potential level by holding a transistor, used for equalization, at a potential low enough not to turn on. CONSTITUTION:An address input signal ADi is inputted and its complementary signals AD'i and A'Di' are generated by an address buffer circuit AB; and they are inputted to NOR circuits N2 and N1 directly and through delay circuits 21 and 20 respectively, and the outputs of the gates N1 and N2 are supplied to an NOR gate N3 to obtain a one-shot signal Ai'. Similarly, one-shot signals are detected with regard to other addresses AD1-AD12 by setting an OR gate RG, obtaining a signal EQ.
申请公布号 JPS5794982(A) 申请公布日期 1982.06.12
申请号 JP19800170070 申请日期 1980.12.02
申请人 NIPPON DENKI KK 发明人 SUEYOSHI SHIGETAKA;TOKUSHIGE KAZUO
分类号 G11C11/41;G11C8/18 主分类号 G11C11/41
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