发明名称 INTERRUPTION PROCESSING SYSTEM FOR COMPOSITE SYSTEM
摘要 PURPOSE:To assuredly perform the process of an interruption, etc., by fixing the instruction address return number and adding the instruction address return number to the contents of a present program counter when a pogram exceptional interruption conditions, etc. arises. CONSTITUTION:When a machine error is detected at a scholar unit 2, the unit 2 sends an instruction address return number alternation inhibiting command to a vector unit 3. Receiving this command, the unit 3 fixes the contents of an instruction counter 8 plus the contents of the program accessible registers.
申请公布号 JPS5794854(A) 申请公布日期 1982.06.12
申请号 JP19800170542 申请日期 1980.12.03
申请人 FUJITSU KK 发明人 OOKAWA MASAYUKI;OKAMOTO TETSUO;OONISHI KATSUMI
分类号 G06F9/38;G06F9/46;G06F9/48;G06F11/07;G06F11/14;G06F15/16;G06F15/177 主分类号 G06F9/38
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