发明名称 MAGNETIC BUBBLE MEMORY DRIVING CIRCUIT
摘要 PURPOSE:To bring one of output terminals under switching control without increasing the number of input terminals by latching an output switching signal inputted to one input terminal on time-division basis and by decoding the latch output. CONSTITUTION:Clock pulses are inputted to the clock terminals C of latching circuits 9, 10 and 11 at prescribed timing respectively and an output switching signal is inputted to each input terminal D from a terminal 4, so that the output terminals Q of the circuits 9, 10 and 11 are set to levels L, H and L respectively. Therefore, signals with the levels L, H and L are inputted to the input terminals 13a-13c of a decoding circuit 12, so one of output terminals 14a-14h is selected. Thus, (n) latching circuits are provided to select one of M output terminals, which meets M<=2<n>, by one input terminal.
申请公布号 JPS5794981(A) 申请公布日期 1982.06.12
申请号 JP19800171005 申请日期 1980.12.05
申请人 HITACHI SEISAKUSHO KK 发明人 CHIBA SHINSAKU
分类号 G11C11/14;G11C19/08 主分类号 G11C11/14
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