发明名称 PROTECTION SYSTEM FOR MICROINSTRUCTION CONTROL MEMORY
摘要 PURPOSE:To decrease the number of steps of microinstructions in a processor, by providing a boundary register at the side of a read/write memory instead of providing it in the inside of the processor. CONSTITUTION:Prior to the execution of a microinstruction for memory access, a boundary address is supplied as an intermediate-order address 10 among transfer addresses through an interface line 17 by one of processors 20-22 with a microinstruction to be set in a boundary register 7 by a strobe signal 16. An arithmetic unit 6 adds the intermediate-order address 10 and high-order address 11 to the said boundary address by an addition indication signal, and the result- ing address 15 is set in an address register 4 to attain access by using an access address consisting of the said address and a set low-order address 9.
申请公布号 JPS5794999(A) 申请公布日期 1982.06.12
申请号 JP19800171597 申请日期 1980.12.05
申请人 NIPPON DENKI KK 发明人 IBORI SHIYOUICHI
分类号 G06F9/22;G06F9/26;G06F12/14 主分类号 G06F9/22
代理机构 代理人
主权项
地址