发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To enable the characteristic test of a semiconductor integrated circuit device in an early stage by forming the source and drain electrodes of a measuring MISFET of polysilicon at the step of patterning a polysilicon gate when forming a plurality of MISFETs on a wafer. CONSTITUTION:A plurality of MISFETs and measuring MISFET are formed at the respective regions with ordinary steps on a wafer 1. That is, an LOCOS oxidized film 11 is formed on the wafer 1, a gate insulating film 12 is then formed, an impurity is then introduced, and source and drain regions 39, 40 are formed. Subsequently, polysilicon is used to form a gate electrode 27. In this case, source and drain electrodes 25, 26 are temporarily formed simultaneously upon formation of the gate electrode 27 using polysilicon at the part becoming the measuring MISFET. At this time the characteristic test of the MISFET is carried out to discriminate the propriety of the part at the early stage before completing the element, thereby improving the yield.
申请公布号 JPS5793542(A) 申请公布日期 1982.06.10
申请号 JP19800169553 申请日期 1980.12.03
申请人 HITACHI SEISAKUSHO KK 发明人 MAEDA TOMIJI
分类号 H01L21/66;G01R31/316;H01L23/544;H01L29/45;H01L29/49;(IPC1-7):01L21/66 主分类号 H01L21/66
代理机构 代理人
主权项
地址