| 摘要 |
PURPOSE:To monitor a pulse signal easily, by generaging a timing signal from the pulse signal itself and detecting the normality or abnormality of pulses by both signals. CONSTITUTION:An integral network 41 integrates the output voltage of a D/A converting circuit 3 and is reset by an input pulse A. An output B of the circuit 41 just before reset is stored in an analogue memory 6. If the pulse period becomes short, an output C of a comparator 10 is in the H level because an output F of a subtracting circuit 8 which outputs the output B as it is does not reach a set level; and when the pulse A is applied to a set terminal S of a reset preference FF12, the FF12 is not set, and a detection output Z is generated. If the pulse A is dropped out, the output B exceeds the output of the memory 6 to start the operation of an integral network 12, and the output F of the subtracting circuit 8 becomes lower than the set level, and therefore, the detection output Z is generated similarly. |
