| 摘要 |
PURPOSE:To obtain a clock pulse synchronized with a reference pulse with a simple constitution, by selecting a colck pulse, which comes first after coming of the reference pulse, from clock pulse of plural systems shifted in phase from one another by every prescribed time. CONSTITUTION:Clock pulses of plural systems shifted in phase from one another by every prescribed time are generated from terminals t1-tn and are supplied to flip flop circuits F11-F1n respectively. Meanwhile, a reference pulse HD is supplied to a terminal (h). Flip flop circuits F11-F1n are reset by this reference pulse HD, and their reset is released in accordance with the fall of this pulse. A clock pulse which comes first after this release of reset is selected, and a flip flop to which this clock pulse is applied is triggered. Outputs of gate circuits G21-G2n are supplied to delay circuits D21-D2n through a gate circuit G21-G2n are minutely adjusted the output pulse in phase. |
