| 摘要 |
PURPOSE:To check the fault of an ROM securely by storing data for a parity check in an RAM and by performing error detection by generating and comparing a parity bit with the stored data at any time. CONSTITUTION:After parity checking data is stored in an RAM2b, a CPU1 starts operating and data are read, address by address, out of an ROM2a; and the parity checking data are generated successively by a parity bit generating circuit 4 on the basis of the readout data of the ROM2a, and the generated data are compared with data, read out of the RAM2b by a strobe signal, by a parity error detecting circuit 5. If the both are different from each other, the circuit 5 sends an interruption signal to the CPU1. Consequently, the operation of the CPU1 stops automatically. Then, the data of the ROM2a is corrected and the CPU1 is put in operation again. When no difference is found, the operation of the CPU1 continues without interruption. |
