| 摘要 |
<p>PURPOSE:To prevent the erroneous data rewriting caused by an effect of an external connecting circuit, by providing a buffer between the output of a storage circuit and the input/output common terminal and then supplying the data of the output of the storage circuit and the input/output common terminal after switching these data. CONSTITUTION:When the prescribed data is delivered, the output data is sent to a bus line 9 to be applied to an AND gate 13. On the other hand, the storage control signal LT is set at 1 and the data of the gate 13 is stored at 10. The contents of the storage 10 is delivered to input/output common terminals a0-a3 from an output Q via a buffer 11. In case each data is supplied, the switch control signal M is set at 1. And the data of the terminals a0-a3 are delivered from a switching circuit 12 via an AND gate 16 and an OR gate 18. While the input control signal IP is set at 1, and the output of the circuit 12 is supplied 9 via an AND gate 14.</p> |
