Combination monolithic integrated circuit mfr. - uses successive masking and high temp. diffusion processes to simultaneously obtain IIL devices and analogue transistors

摘要

The integrated circuit has an IIL section (A) with at least one IIl transistor and an analogue section (B) with at least one analogue transistor. It comprises a substrate provided with an epitaxial layer of opposite type which is masked and subjected to high temp. diffusion to obtain an insulating separation zone (1). A second epitaxial layer (3) of similar type to the substrate is then applied and masked before doping to obtain the base zone (6) of the analogue transistor, the injection zone of the IIL transistor, two base contact zones (8) for the latter and an insulating separation zone (15). A further doping layer is applied and masked to obtain the emitter contact zone (11) for the IIL transistor, the emitter (12) of the analogue transistor and a collector contact layer (19) surrounding the base zone (6) of the analogue transistor.