| 发明名称 |
SPLIT SYSTEM BUS CYCLE FOR DIRECT MEMORY ACCESS OF PERIPHERALS IN A CATHODE RAY TUBE DISPLAY SYSTEM |
| 摘要 |
<p>Apparatus in a Cathode Ray Tube (CRT) display allows the sharing of the system bus between the microprocessor(CPU) and Direct Memory Access (DMA) devices without degrading the CPU performance by splitting the system bus cycle into an address phase and a data phase.</p> |
| 申请公布号 |
CA1124876(A) |
申请公布日期 |
1982.06.01 |
| 申请号 |
CA19790339286 |
申请日期 |
1979.11.06 |
| 申请人 |
HONEYWELL INFORMATION SYSTEMS INC. |
发明人 |
STAFFORD, JOHN P.;SLATER, RICHARD A.;KOBS, FREDERICK E.;RYAN, JOSEPH L. |
| 分类号 |
G06F3/153;G06F13/28;G09G1/16;G09G5/00;(IPC1-7):06F3/153 |
主分类号 |
G06F3/153 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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