发明名称 MALFUNCTION DETECTION SYSTEM
摘要 PURPOSE:To output a malfunction signal when two of peripheral equipments are in operation by using one check signal line and simple constitution by providing exclusive OR circuits to the peripheral equipments connected in series. CONSTITUTION:Input-output equipments 1, 2 and 3 are provided with exclusive OR circuits 10, 11 and 12. If the input-output equipment 1 is in operation, a selection signal SEL-A is a 1 and a signal 0 is applied to the other input line 16-1 at all times, so that a selective check signal SLCK-A is a 1. The SEL-B and SEL-C are normally 0s because they are not in operation. Therefore, the output of an inverter 14 in an input-output controller 4 is a 0 and if even one equipment is in operation, a fault check signal CKTMG is a 1, so that an AND circuit 15 outputs a 0. When the other input-output equipments operate, the inverter 14 outputs a 1, so that a signal ErO indicating an error occurrence state is outputted as a 1.
申请公布号 JPS5786925(A) 申请公布日期 1982.05.31
申请号 JP19800163018 申请日期 1980.11.19
申请人 FUJITSU KK 发明人 SATOU MASAO;HOSHI FUMIO
分类号 G06F11/30;G06F11/00;G06F13/00 主分类号 G06F11/30
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