发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To prevent the breaking of wiring for the subject semiconductor device by a method wherein, when performing a photoetching process on a contact hole, an etching process, which will be performed on a part of film using the pattern having the size which is larger by the prescribed size than the desired pattern, is added and an acute stepping is eliminated. CONSTITUTION:In the process of manufacture of an Si gate MOSIC, for example, after a gate electrode 5, a wiring layer 5', a source and drain diffusion layers 3 and 3', and an interlayer insulating film 6 have been formed successively, a contact hole is formed on a film 6 by performing a photoetching. On the region whereon the contact hole was formed, the film 6 is selectively photoetched at a depth which is 30-70% of the film thickness, using a pattern which is 4-6mum larger than the desired measurements. Then, on the inside of the regions 10 and 11, whereon the film 6 was thinned off, apertures 12 and 13 of the prescribed measurements are formed by performing a photoetching, and then an Al wiring layer 9 is formed. Through these procedures, as the stepping is divided into two parts (double-stepped), the Al wiring 9 can be formed easily, and the generation of breaking of wire can be prevented.
申请公布号 JPS5787155(A) 申请公布日期 1982.05.31
申请号 JP19800163555 申请日期 1980.11.20
申请人 SUWA SEIKOSHA KK 发明人 YUDASAKA KAZUO
分类号 H01L21/3213;(IPC1-7):01L21/88 主分类号 H01L21/3213
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