| 摘要 |
PURPOSE:To increase the gate withstand voltage by removing the side etching of an oxide film for the subject semiconductor integrated circuit by a method wherein, when the gate oxide film of an MOS type semiconductor IC is formed, first, a thick oxide film is provided by specifying the thickness, and the film is thinned off to the specified thickness by performing an etching. CONSTITUTION:A thick field oxide film 9 is formed on the circumference of a P type Si substrate 8, and then a gate oxide film 10 of 500Angstrom or more in thickness is coated on the surface of the substrate 8 which is surrounded by the film 9, and at the center part of which, a gate electrode 11 consisting of a polycrystalline Si is formed. Then, using this electrode 11 as a mask, the film 10 is thinned off to 500Angstrom or below in thickness by performing an etching on the film 10 of the source and drain formed region, the film 10 is converted to phosphor glass and at the same time, phosphor is diffused through the film 10, and a shallow N type source and drain region 13 of 0.1-0.5mum is formed. Through these procedures, no cavity due to side etching is generated on the gate oxide film 10, and the drop of gate dielectric breakdown voltage due to the entrance of contaminated substance is not generated. |
