| 摘要 |
PURPOSE:To separate and output a plurality of signals from a serial data signal with simple constitution, by combining AND and OR gates. CONSTITUTION:When a pulse of ''1'' lever is supplied to an input terminal B of a signal separation circuit 31, output terminals C and D are at level 0 and 1 at the rise of signal. The output of an OR gate 34 is applied to an AND gate 32, the output of the gate 32 is applied to a gate 34 and the output of the gate 34 is kept at level 1 even if the signal at the terminal B is at level 0. Thus, the output of the terminal D is at level 1. This state is kept until an input terminal A is at level 0, and consequently a signal applied to the terminal A is split to the terminals C,D in the timing of pulse applied to the terminal B. |
