发明名称 FRAME NUMBER REPRODUCING SYSTEM
摘要 PURPOSE:To surely pick up the frame number, by generating gate pulses for a plurality and starting the pulses in faster timing with sufficient margin than the horizontal scanning period of inserted location of the frame number. CONSTITUTION:A video signal from an FM demodulator 13 is applied to a memory 23 and a display circuit 24 while a gate pulse Sg is applied to a frame number pickup circuit 15 to supply a frame number Sf included in the said video signal. A frame number recording region detection circuit 21 transmits a pulse Sd which indicates the region where a frame number which is turned on the 1st pulse of a digital pulse train representing the frame number from the video signal and turned off with the final m-th pulse is recorded, to a logical product circuit 22. The circuit 22 take-up the ANDs of Sm, Sd, and SG and a memory latch pulse SL then apply to a memory 23 and a display circuit 24. The said SL stores the frame number Sf only from the video signal transmitted from the circuit 15 to the memory and display circuit for storage and display.
申请公布号 JPS5784693(A) 申请公布日期 1982.05.27
申请号 JP19800161717 申请日期 1980.11.17
申请人 FUJITSU KK 发明人 OGAWA KOUICHI;ARAI SHIGERU;MINAMI AKIRA;SHIBATA ITARU;OGAWA SEIYA
分类号 H04N5/93;G11B27/10;G11B27/30 主分类号 H04N5/93
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