| 摘要 |
PURPOSE:To obtain a master slice LSI enhancing driving ability of an inside gate to drive an output buffer circuit to load capacity and contriving to improve delay time by a method wherein a resistor is inserted between the input end of the output buffer circuit and an electric power source voltage. CONSTITUTION:The inside gate circuit A, the output buffer circuit B to constitute the gate array type master slice LSi are formed. Elements of transistor, resistor, etc., are formed previously in the master pattern forming region, and by changing the progress of wiring work, logic gates are formed and wirings between respective gates are performed. The LSI is formed as to insert the resistor R15 between the input end of the output buffer circuit B and the electric power source voltage VEE. A resistor R4 and the resistor R15 are connected in parallel to an emitter follower transistor Q5 of the inside gate to drive the output buffer circuit B to reduce resistance of the emitter follower, and driving force of the inside gate is increased. |
