| 摘要 |
PURPOSE:To make the operation processing of variable length data high-speed, by designating a byte mark to perform the operation processing of data, which is shorter than the access byte length, with the access byte length and by storing all bytes. CONSTITUTION:In case of the execution of this system, an operation circuit ALU of a processing byte length of plural bytes, a byte mark generating circuit BMG which generates a byte mark BM on a basis of the relation between an operand length L or L1 and L2 of the instruction word and the processing byte length, and a status circuit STG which generates status information on a basis of the byte mark BM and status information ST of the byte unit of the operation circuit ALU are provided. Data of the access byte length is read out from a storage device and is operated in the byte unit designated by the byte mark BM, and bytes which are not indicated by the byte mark are outputted as they are, and therefore, data of the access address length of the storage device is outputted from the operation circuit ALU. Consequently, all bytes are stored even for one-byte operation. |
