发明名称 Microprocessor apparatus and method
摘要 Microprocessor apparatus in which the CPU generates as an integral function memory refresh addresses for an external dynamic memory without degradation of CPU performance. The CPU architecture is optimized by dividing the CPU devices selectively into groups during different time periods by the use of switching devices in the internal bus structure.
申请公布号 US4332008(A) 申请公布日期 1982.05.25
申请号 US19790092827 申请日期 1979.11.09
申请人 ZILOG, INC. 发明人 SHIMA, MASATOSHI;FAGGIN, FEDERICO;UNGERMANN, RALPH K.
分类号 G06F15/78;G11C11/406;(IPC1-7):G06F9/00;G06F13/00 主分类号 G06F15/78
代理机构 代理人
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