| 摘要 |
PURPOSE:To improve the efficiency of a memory access, by equalizing the access frequency between storage units. CONSTITUTION:Tables TABL0, TABL1 constitute a table which stores effective bits V0-V3 and interleave control bits I0-I3 of a module, and this table is set in advance by software or hardware. For instance, in case when the table has been set as V0-V3=1, I3=0, and I0-I2=1, V0, V2, I0 and I2 are equal to ''1'' when an access address AA from an access device is 00-1F, therefore, an output of an AND circuit AND becomes ''1'', a selecting circuit SEL selects the side of ''1'', and flow of its address bit becomes like a solid line. Also, in case when the access address AA is 20-3F, I3 is equal to ''0'', therefore, an output of the AND becomes ''0'', the selecting circuit SEL selects the side of ''0'', and the flow of the address bit becomes like a dotted line. In this way, the addressing is operated so as to be varied, depending on a module. |
